220 35596 article Path: news.gmane.org!.POSTED!not-for-mail From: Hyman Rosen Newsgroups: gmane.comp.lang.c++.isocpp.proposals Subject: Re: Re: Rotational shift operator Date: Wed, 29 Nov 2017 12:17:35 -0500 Lines: 123 Approved: news@gmane.org Message-ID: References: <69593098-e2cc-487e-bd14-9001b27aa7c1@isocpp.org> <6888287.JoKhHhR3xM@tjmaciei-mobl1> <3058817.kvbDme98ge@tjmaciei-mobl1> Reply-To: std-proposals@isocpp.org NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: multipart/alternative; boundary="001a114b3de205e780055f225175" X-Trace: blaine.gmane.org 1511975880 29839 195.159.176.226 (29 Nov 2017 17:18:00 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Wed, 29 Nov 2017 17:18:00 +0000 (UTC) To: std-proposals@isocpp.org Original-X-From: std-proposals+bncBDKJJPVBQMKRBROX7PIAKGQEQJGUL6Y@isocpp.org Wed Nov 29 18:17:52 2017 Return-path: Envelope-to: gclcip-std-proposals@m.gmane.org Original-Received: from mail-wr0-f199.google.com ([209.85.128.199]) by blaine.gmane.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eK5zb-0007GU-82 for gclcip-std-proposals@m.gmane.org; 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[209.85.220.41]) by mx.google.com with SMTPS id 31sor970558wri.44.2017.11.29.09.17.57 for (Google Transport Security); Wed, 29 Nov 2017 09:17:57 -0800 (PST) Received-SPF: pass (google.com: domain of hyman.rosen@gmail.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 10.223.130.17 with SMTP id 17mr3263709wrb.131.1511975876420; Wed, 29 Nov 2017 09:17:56 -0800 (PST) Original-Received: by 10.28.57.214 with HTTP; Wed, 29 Nov 2017 09:17:35 -0800 (PST) In-Reply-To: <3058817.kvbDme98ge@tjmaciei-mobl1> X-Original-Sender: hyman.rosen@gmail.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=AzOkfopY; spf=pass (google.com: domain of hyman.rosen@gmail.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=hyman.rosen@gmail.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Precedence: list Mailing-list: list std-proposals@isocpp.org; contact std-proposals+owners@isocpp.org List-ID: X-Google-Group-Id: 399137483710 List-Post: , List-Help: , List-Archive: List-Subscribe: , List-Unsubscribe: , Xref: news.gmane.org gmane.comp.lang.c++.isocpp.proposals:35596 Archived-At: --001a114b3de205e780055f225175 Content-Type: text/plain; charset="UTF-8" On Tue, Nov 28, 2017 at 8:33 PM, Thiago Macieira wrote: > > > What should, according to you, the following produce: > > > > 1U << functionThatReturns33(); > > > > Please answer bearing in mind that the SHL operation in assembly is only > > specified to work with values less than 32. Any higher value may shift > > everything, nothing, or shift by the modulo 32. > > Please answer in two cases: > > 1) regular context, the compiler could not inline functionThatReturns33() > > 2) constant expression context, the compiler can inline and did constant > propagation First of all, there is no reason for the behavior to be undefined rather than unspecified, unless there are platforms where doing such shifts causes traps in a way that would be unnatural to prevent. The value should be whatever the naive assembly language shift instruction generates with such a count. On Intel platforms beyond the 8086, for example, it is specified that the processor masks the shift count with 5 or 6 bits depending on whether the shift is of a 32-bit or 64-bit value, so the shift is done modulo the bit size - shifting a 32-bit value by 32 leaves the value unchanged. < https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf > If the compiler can detect that the shift size is such a too-large value, it should issue a warning, because it is unlikely that the programmer intended the behavior, but the code that it generates should be as-if the naive shift were executed. In all cases, the result of const expressions, constexpr expressions, and preprocessor expressions should match the results that would obtain if the expressions were to be evaluated at runtime. -- You received this message because you are subscribed to the Google Groups "ISO C++ Standard - Future Proposals" group. To unsubscribe from this group and stop receiving emails from it, send an email to std-proposals+unsubscribe@isocpp.org. To post to this group, send email to std-proposals@isocpp.org. To view this discussion on the web visit https://groups.google.com/a/isocpp.org/d/msgid/std-proposals/CAHSYqdYu3qrNMfKXGAosv8p1rq3wxxYSNQ4bpdiyWP4SxFVZKA%40mail.gmail.com. --001a114b3de205e780055f225175 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
On T= ue, Nov 28, 2017 at 8:33 PM, Thiago Macieira <thiago@macieira.org&g= t; wrote:
> What should, according to you, the following produce:
>
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A01U << functionThatReturns33();<= br> >
> Please answer bearing in mind that the SHL operation in assembly is on= ly
> specified to work with values less than 32. Any higher value may shift=
> everything, nothing, or shift by the modulo 32.

Please answer in two cases:

=C2=A01) regular context, the compiler could not inline functionThatReturns= 33()

=C2=A02) constant expression context, the compiler can inline and did const= ant
propagation

First of all, there is no reason for the b= ehavior to be undefined rather than
unspecified, unless there are platfo= rms where doing such shifts causes traps
in a way that would be unnatura= l to prevent.

The value should be whatever the naive assembly langua= ge shift instruction
generates with such a count.=C2=A0 On Intel platfor= ms beyond the 8086, for example,
it is specified that the processor mask= s the shift count with 5 or 6 bits depending
on whether the shift is of = a 32-bit or 64-bit value, so the shift is done modulo the
bit size - shi= fting a 32-bit value by 32 leaves the value unchanged.
<https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64= -ia-32-architectures-software-developer-instruction-set-reference-manual-32= 5383.pdf>

If the compiler can detect that the shift size is s= uch a too-large value, it should
issue a warning, because it is unlikely= that the programmer intended the behavior,
but the code that it generat= es should be as-if the naive shift were executed.

In all cases, the = result of const expressions, constexpr expressions, and
preprocessor exp= ressions=C2=A0should match the results that would obtain if the
expressi= ons were to be evaluated at runtime.

--
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