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From: hbaker@netcom.com (Henry Baker)
Subject: Re: Parallel & RT GC (was Re: Real-Time GC (was Re: Widespread C++...?)
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References: <787227087snz@wslint.demon.co.uk> <3ckb8g$841@gateway.wiltel.com> <1994Dec21.151952.8902@merlin.h <19941230.201628.350635.NETNEWS@UICVM.UIC.EDU> <3e9f60$8du@jive.cs.utexas.edu> <3epfsi$64d@gamma.ois.com> <3eua1r$4ea@gnat.cs.nyu.edu> <3f5vaf$r07@gamma.ois.com> <kelvin.790009178@kickapoo> <EACHUS.95Jan17112913@spectre.mitre.org>
Date: Wed, 18 Jan 1995 15:27:50 GMT
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In article <EACHUS.95Jan17112913@spectre.mitre.org>,
eachus@spectre.mitre.org (Robert I. Eachus) wrote:

> In article <kelvin.790009178@kickapoo> kelvin@cs.iastate.edu (Kelvin
Nilsen) writes:
> 
>    > By placing the custom hardware within the memory subsystem,
>    > we are able to provide the desired benefits without most of the
>    > costs of developing special-purpose CPUs.
> 
>     There is another major reason for putting the custom hardware in
> the memory system.  There is a fairly large class of problems which
> require time proportional to n^k lg2 n on any von Neuman architecture,
> but can be solved in time n^(k-1) lg2 on hardware which supports
> clearing large sections of memory to zero in constant time.  (Note
> that if k is one, you can get orders of magnitude improvement.)

Simple example, please?


